GPIO

Basic I/O

The functions listed below are applicable to operating a single input/output pin in a manual configuration; that is, the code directly reads or controls the pin values.

For each of these functions, the value for the first argument, uint8_t port, may simply be the port number (1-10, 11 for port J), or the predefined symbols GPIO_PORT_Pn can be used, where n is the port number. The second argument, uint8_t pins, should use the predefined symbols GPIO_PINm, where m is the pin number. These functions will not work correctly if the pin number is directly given to the function.

  • uint8_t GPIO_getInputPinValue(uint8_t port,uint8_t pins): Read the value of a pin within the selected port. Returns 0x01 if the input is High and 0x00 if the input is Low.

  • void GPIO_setOutputLowOnPin(uint8_t port,uint8_t pins): Set one or multiple pins on a port to output Low if configured as outputs.

  • void GPIO_setOutputHighOnPin(uint8_t port,uint8_t pins): Set one or multiple pins on a port to output High if configured as outputs.

  • void GPIO_toggleOutputOnPin(uint8_t port,uint8_t pins): Invert the output level of one or multiple pins on a port if configured as outputs.

  • void GPIO_setAsOutputPin(uint8_t port,uint8_t pins): Configure one or multiple pins on a port to be outputs.

  • void GPIO_setAsInputPin(uint8_t port,uint8_t pins): Configure one or multiple pins on a port to be inputs.

  • void GPIO_setAsInputPinWithPullUpResistor(uint8_t port,uint8_t pins): Configure one or multiple pins on a port to be inputs with internal pull resistors connected to 3.3 V.

  • void GPIO_setAsInputPinWithPullDownResistor(uint8_t port,uint8_t pins): Configure one or multiple pins on a port to be inputs with internal pull resistors connect to 0 V.

All these functions except GPIO_getInputPinValue can operate uisng multiple pins at once. To use multiple pins, all desired pin symbols (GPIO_PINm) should be ‘bitwise or’ed together.

Examples:

  • Configure P2.1 as an output and set it’s value High:

    GPIO_setAsOutputPin( GPIO_PORT_P2, GPIO_PIN1 ); // Set P2.1 as an output
...
GPIO_setOutputHighOnPin( GPIO_PORT_P2, GPIO_PIN1 ); // Set P2.1 high

  • Configure P6.1 and P6.3 as inputs and read both values:

    uint8_t val1,val2;
GPIO_setAsInputPin( 6, GPIO_PIN1 | GPIO_PIN3 ); // Set P6.1,3 to inputs
...
val1 = GPIO_getInputPinValue( 6, GPIO_PIN1 ); // Read and store the value of P6.1
val2 = GPIO_getInputPinValue( 6, GPIO_PIN3 ); // Read and store the value of P6.3

Interrupts

A GPIO pin can trigger an interrupt when its value changes: either from low-to-high or high-to-low. These events are known as a rising edge and falling edge, respectively. The pin cannot be configured to trigger an interrupt on both without manually manipulating the configuration after each edge is detected.

../_images/edges.svg

GPIO Signal Edges

Each pin interrupt trigger will invoke a single interrupt service routine, or ISR, for the associated port. This implies that if multiple pins within one port are configured to generate interrupts, there must be code to support determining what pin triggered the interrupt.

Enabling Interrupts

Each GPIO pin may have its interrupt capability enabled and disabled using the functions:

  • void GPIO_enableInterrupt( uint8_t port, uint8_t pins)

  • void GPIO_disableInterrupt( uint8_t port, uint8_t pins)

Further, selection of the rising or falling edge as the interrupt event may be done through the function:

void GPIO_interruptEdgeSelect( uint8_t port , uint8_t pins , uint8_t edgeSelect )

where uint8_t edgeSelect is either GPIO_LOW_TO_HIGH_TRANSITION or GPIO_HIGH_TO_LOW_TRANSITION.

Each port interrupt, if enabled, must be associated with a function to run when the interrupt is triggered: the ISR. This function is a normal function that takes no inputs and produces no output. The function can be linked, or registered, to the port interrupt through:

void GPIO_registerInterrupt( uint8_t port , <function_name> )

For example, to associate the GPIO Port 5 interrupt with the function void foo(void):

GPIO_registerInterrupt(GPIO_PORT_P5,foo);

Interrupt Handling

The ISR function associated with the port will be automatically called when the selected edge is detected on any of the enabled port pins. Within this function, the code must acknowledge the interrupt by clearing the associated flag, or register bit that indicates the interrupt was triggered. If the flag is not cleared, the interrupt will continuously trigger; that is, the function will be immediately called again once it completes.

The interrupt source must be acknowledged using:

void GPIO_clearInterruptFlag( uint8_t port , uint8_t pins )

If multiple pins are enabled as trigger sources, it is necessary to determine which pin triggered the interrupt. This may be done through the function:

uint16_t GPIO_getEnabledInterruptStatus( uint8_t port )

where this function returns a value that is a bitwise-or, |, of all pins within the specified port that have triggered the interrupt. For example, if pushbuttons on P3.1 and P3.3 were pressed simultaneously, this function would return the value GPIO_PIN1 | GPIO_PIN3.

Alternate Functions

Each GPIO pin is capable of being internally connected to other module signals. When an alternative function is used, the GPIO pin is controlled directly from module it is connected to. There are up to 6 total signals that may be selected as an alternative function: 3 input and 3 output. These may be selected via the functions:

void GPIO_setAsPeripheralModuleFunctionInputPin( uint8_t port , uint8_t pins , uint8_t mode ) void GPIO_setAsPeripheralModuleFunctionOutputPin( uint8_t port , uint8_t pins , uint8_t mode )

where uint8_t mode is one of GPIO_PRIMARY_MODULE_FUNCTION, GPIO_SECONDARY_MODULE_FUNCTION, or GPIO_TERTIARY_MODULE_FUNCTION. Issuing one of the above functions will override any previous configuration of the selected pin(s). Likewise, the GPIO pin can be converted back to a normal input or output pin by issuing the corresponding function.

The alternate functions for each pin are listed in the table below. For the MSP432P401R, the Tertiary inputs and outputs are equivalent functions and as such only one tertiary row is listed. Further, selecting input or output mode is not impactful as the module is given control of the pin direction (e.g., P1.0 UCA0STE).

If an output mode alternate function is specified that does not have an associated signal as listed in the table, the pin would be connected to DVSS (ground). If an input pin alternate function is specified that does not have an associated signal as listed in the table, the pin will act like a normal input.

GPIO Alternate Functions

Input Mode

Output Mode

In & Out

Pin

Primary

Secondary

Primary

Secondary

Tertiary

P1.0

UCA0STE

UCA0STE

P1.1

UCA0CLK

UCA0CLK

P1.2

UCA0RXD/

UCA0SOMI

UCA0RXD/

UCA0SOMI

P1.3

UCA0TXD/

UCA0SIMO

UCA0TXD/

UCA0SIMO

P1.4

UCB0STE

UCB0STE

P1.5

UCB0CLK

UCB0CLK

P1.6

UCB0SIMO/

UCB0SDA

UCB0SIMO/

UCB0SDA

P1.7

UCB0SOMI/

UCB0SCL

UCB0SOMI/

UCB0SCL

P2.0

UCA1STE

UCA1STE

P2.1

UCA1CLK

UCA1CLK

P2.2

UCA1RXD/

UCA1RXD/

UCA1SOMI

UCA1SOMI

P2.3

UCA1TXD/

UCA1SIMO

UCA1TXD/

UCA1SIMO

P2.4

TA0.CCI1A

TA0.1

P2.5

TA0.CCI2A

TA0.2

P2.6

TA0.CCI3A

TA0.3

P2.7

TA0.CCI4A

TA0.4

P3.0

UCA2STE

UCA2STE

P3.1

UCA2CLK

UCA2CLK

P3.2

UCA2RXD/

UCA2SOMI

UCA2RXD/

UCA2SOMI

P3.3

UCA2TXD/

UCA2SIMO

UCA2TXD/

UCA2SIMO

P3.4

UCB2STE

UCB2STE

P3.5

UCB2CLK

UCB2CLK

P3.6

UCB2SIMO/

UCB2SDA

UCB2SIMO/

UCB2SDA

P3.7

UCB2SOMI/

UCB2SCL

UCB2SOMI/

UCB2SCL

P4.0

A13

P4.1

A12

P4.2

TA2CLK

ACLK

A11

P4.3

MCLK

RTCCLK

A10

P4.4

HSMCLK

SVMHOUT

A9

P4.5

A8

P4.6

A7

P4.7

A6

P5.0

A5

P5.1

A4

P5.2

A3

P5.3

A2

P5.4

A1

P5.5

A0

P5.6

TA2.CCI1A

TA2.1

VREF+/

C1.7

P5.7

TA2.CCI2A

TA2.2

VREF-/

C1.6

P6.0

A15

P6.1

A14

P6.2

UCB1STE

C1.5

P6.3

UCB1CLK

UCB1CLK

C1.4

P6.4

UCB1SIMO/

UCB1SDA

UCB1SIMO/

UCB1SDA/

C1.3

P6.5

UCB1SOMI/

UCB1SCL

UCB1SOMI/

UCB1SCL

C1.2

P6.6

TA2.CCI3A

UCB3SIMO /

UCB3SDA

TA2.3

UCB3SIMO/

UCB3SDA

C1.1

P6.7

TA2.CCI4A

UCB3SOMI /

UCB3SCL

TA2.4

UCB3SOMI/

UCB3SCL

C1.0

P7.0

DMAE0

SMCLK

P7.1

TA0CLK

C0OUT

P7.2

TA1CLK

C1OUT

P7.3

TA0.CCI0A

TA0.0

P7.4

TA1.CCI4A

TA1.4

C0.5

P7.5

TA1.CCI3A

TA1.3

C0.4

P7.6

TA1.CCI2A

TA1.2

C0.3

P7.7

TA1.CCI1A

TA1.1

C0.2

P8.0

UCB3STE

TA1.CCI0A

UCB3STE

TA1.0

C0.1

P8.1

UCB3CLK

TA2.CCI0A

UCB3CLK

TA2.0

C0.0

P8.2

TA3.CCI2A

TA3.2

A23

P8.3

TA3CLK

A22

P8.4

A21

P8.5

A20

P8.6

A19

P8.7

A18

P9.0

A17

P9.1

A16

P9.2

TA3.CCI3A

TA3.3

P9.3

TA3.CCI4A

TA3.4

P9.4

UCA3STE

UCA3STE

P9.5

UCA3CLK

UCA3CLK

P9.6

UCA3RXD/

UCA3SOMI

UCA3RXD/

UCA3SOMI

P9.7

UCA3TXD/

UCA3SIMO

UCA3TXD/

UCA3SIMO

P10.0

UCB3STE

UCB3STE

P10.1

UCB3CLK

UCB3CLK

P10.2

UCB3RXD/

UCB3SOMI

UCB3RXD/

UCB3SOMI

P10.3

UCB3TXD/

UCB3SIMO

UCB3TXD/

UCB3SIMO

P10.4

TA3.CCI0A

TA3.0

C0.7

P10.5

TA3.CCI1A

TA3.1

C0.6