Motorola DSP56300 Assembler Version 6.2.0 99-12-02 20:05:02 pass_S~3.asm Page 1 1 ;*************************************************************************** 2 ;QS_ST.ASM : WILL PASS AUDIO STRAIGHT THROUGH 3 ;*************************************************************************** 1067 1068 ;****************************************************************************** 1069 1070 ;---Buffer for talking to the CS4215 1071 1072 X:000000 org x:0 1073 RX_BUFF_BASE 1074 000000 equ * 1075 RX_data_1_2 1076 X:000000 ds 1 ;data time slot 1/2 for RX ISR 1077 RX_data_3_4 1078 X:000001 ds 1 ;data time slot 3/4 for RX ISR 1079 RX_data_5_6 1080 X:000002 ds 1 ;data time slot 5/6 for RX ISR 1081 RX_data_7_8 1082 X:000003 ds 1 ;data time slot 7/8 for RX ISR 1083 1084 TX_BUFF_BASE 1085 000004 equ * 1086 TX_data_1_2 1087 X:000004 ds 1 ;data time slot 1/2 for TX ISR 1088 TX_data_3_4 1089 X:000005 ds 1 ;data time slot 3/4 for TX ISR 1090 TX_data_5_6 1091 X:000006 ds 1 ;data time slot 5/6 for TX ISR 1092 TX_data_7_8 1093 X:000007 ds 1 ;data time slot 7/8 for TX ISR 1094 1095 X:000008 RX_PTR ds 1 ; Pointer for rx buffer 1096 X:000009 TX_PTR ds 1 ; Pointer for tx buffer 1097 1098 ;TONE_OUTPUT EQU HEADPHONE_EN+LINEOUT_EN+(4*LEFT_ATTN)+(4*RIGHT_ATTN) 1099 ;TONE_INPUT EQU MIC_IN_SELECT+(15*MONITOR_ATTN) 1100 ;CTRL_WD_12 equ NO_PREAMP+HI_PASS_FILT+SAMP_RATE_48+STEREO+DATA_16 ;CLB=0 1101 ;CTRL_WD_34 equ IMMED_3STATE+XTAL1_SELECT+BITS_64+CODEC_MASTER 1102 ;CTRL_WD_56 equ $000000 1103 ;CTRL_WD_78 equ $000000 1104 1105 000300 CTRL_WD_12 equ MIN_LEFT_ATTN+MIN_RIGHT_ATTN+LIN2+RIN2 1106 000000 CTRL_WD_34 equ MIN_LEFT_GAIN+MIN_RIGHT_GAIN 1107 1108 1109 P:000050 org p:$50 ;SCI Recieve Data Interrupt 1110 P:000050 0BF080 jsr ISCIRD 000157 1111 1112 P:000100 org p:$100 1113 START 1114 main 1115 P:000100 08F4BD movep #$040003,x:M_PCTL ; set PLL for MPY of 4X 040003 1116 P:000102 08F4BB movep #$012421,x:M_BCR ; set up one ext. wait state for all AAR areas 012421 Motorola DSP56300 Assembler Version 6.2.0 99-12-02 20:05:02 pass_S~3.asm Page 2 1117 P:000104 0003F8 ori #3,mr ;mask interrupts 1118 P:000105 0500BB movec #0,sp ;clear hardware stack pointer 1119 P:000106 0500BA move #0,omr ;operating mode 0 1120 P:000107 364000 move #$40,r6 ; initialise stack pointer 1121 P:000108 05F426 move #-1,m6 ; linear addressing FFFFFF 1122 P:00010A 0BF080 jsr ada_init ; initialize codec 0001A8 1123 1124 1125 ; initialize SCI 1126 ; 10-bit asynchronous mode 1127 ; enable reciever and transmitter 1128 P:00010C 07F41C movep #$000B02,x:M_SCR ; SCI control register 000B02 1129 ; set interrupt priority for SCI RECV to 1 1130 P:00010E 56F000 move x:M_IPRP,a FFFFFE 1131 ; enable tx and rx pins 1132 P:000110 07F41F movep #$000003,x:M_PCRE ; Port E Control Register 000003 1133 P:000112 0140C2 or #000080,a 000050 1134 ; Reciever/Transmitter clocks use external clock from SCLK 1135 P:000114 07F41B movep #$00C000,x:M_SCCR ; SCI Clock Control Register 00C000 1136 P:000116 567000 move a,x:M_IPRP ; interrupt priority peripheral FFFFFE 1137 1138 ;print a greeting and instructions 1139 P:000118 65F400 move #greet,r5 000001 1140 P:00011A 0BF080 jsr print 000133 1141 1142 ; move #$123456,a1 1143 ; move #$789abc,a0 1144 ; move a,y0 1145 ; debug 1146 1147 1148 loop_1 1149 1150 P:00011C 01B7A2 jset #2,x:M_SSISR0,* ;wait for frame sync to pass 00011C 1151 P:00011E 01B782 jclr #2,x:M_SSISR0,* ;wait for frame sync 00011E 1152 1153 P:000120 568000 move x:RX_BUFF_BASE,a ;receive left 1154 P:000121 578100 move x:RX_BUFF_BASE+1,b ;receive right 1155 P:000122 0BF080 jsr process_stereo 00012D 1156 P:000124 560400 move a,x:TX_BUFF_BASE ;transmit left 1157 P:000125 570500 move b,x:TX_BUFF_BASE+1 ;transmit right 1158 1159 P:000126 46F400 move #CTRL_WD_12,y0 ;set up control words Motorola DSP56300 Assembler Version 6.2.0 99-12-02 20:05:02 pass_S~3.asm Page 3 000300 1160 P:000128 460600 move y0,x:TX_BUFF_BASE+2 1161 P:000129 46F400 move #CTRL_WD_12,y0 000300 1162 P:00012B 460700 move y0,x:TX_BUFF_BASE+3 1163 1164 P:00012C 0C011C jmp loop_1 1165 1166 process_stereo 1167 P:00012D 4EF000 move y:mask,y0 000000 1168 P:00012F 200056 and y0,a 1169 P:000130 20005E and y0,b 1170 P:000131 000000 nop 1171 P:000132 00000C rts 1172 1173 1174 ;print subroutine takes address in register r5 1175 ;exits when most significant byte is zero 1176 ;ignores zeros in lower bytes 1177 ; clobbers register y0 1178 print 1179 P:000133 21C600 move a,y0 ; back up reg A 1180 P:000134 5EDD00 prbegin move y:(r5)+,a 1181 P:000135 0140C5 cmp #$00ffff,a ;check to see if done (char=$00) 00FFFF 1182 P:000137 0D1049 blt prend 00001E 1183 P:000139 019381 jclr #1,x:M_SSR,* ;wait for tx to finish 000139 1184 P:00013B 019380 jclr #0,x:M_SSR,* ;wait for tx to finish 00013B 1185 P:00013D 567000 move a,x:M_STXH ; send high byte FFFF97 1186 P:00013F 0140C6 and #$00ffff,a 00FFFF 1187 P:000141 0140C5 cmp #$0000ff,a 0000FF 1188 P:000143 0597D1 blt prbegin 1189 P:000144 019381 jclr #1,x:M_SSR,* ;wait for tx to finish 000144 1190 P:000146 019380 jclr #0,x:M_SSR,* ;wait for tx to finish 000146 1191 P:000148 567000 move a,x:M_STXM ; send mid byte FFFF96 1192 P:00014A 0140C6 and #$0000ff,a 0000FF 1193 P:00014C 014085 cmp #$000000,a 1194 P:00014D 0597C7 blt prbegin 1195 P:00014E 019381 jclr #1,x:M_SSR,* ;wait for tx to finish 00014E 1196 P:000150 019380 jclr #0,x:M_SSR,* ;wait for tx to finish 000150 1197 P:000152 567000 move a,x:M_STXL ; send low byte FFFF95 1198 P:000154 050FC0 bra prbegin Motorola DSP56300 Assembler Version 6.2.0 99-12-02 20:05:02 pass_S~3.asm Page 4 1199 P:000155 20CE00 prend move y0,a ;restore reg A 1200 P:000156 00000C rts 1201 1202 1203 P:000157 21C600 ISCIRD move a,y0 ;back up A 1204 P:000158 56F000 move x:M_SRXL,a FFFF98 1205 P:00015A 0140C5 cmp #$40,a ; >='A' 000040 1206 P:00015C 0D1049 blt iscend 00004A 1207 P:00015E 0140C5 cmp #$51,a ; <='P' 000051 1208 P:000160 0D1049 blt isciup 00000F 1209 P:000162 0140C5 cmp #$60,a ; >='a' 000060 1210 P:000164 0D1049 blt iscend 000042 1211 P:000166 0140C5 cmp #$70,a ; <='p' 000070 1212 P:000168 0D1047 bgt iscend 00003E 1213 P:00016A 016084 sub #$20,a 1214 P:00016B 019381 jclr #1,x:M_SSR,* ;wait for tx to finish 00016B 1215 P:00016D 019380 jclr #0,x:M_SSR,* ;wait for tx to finish 00016D 1216 1217 P:00016F 567000 isciup move a,x:M_STXL ; echo character FFFF95 1218 P:000171 5E7000 move a,y:mask ;hold onto value temporarially 000000 1219 P:000173 0140C4 sub #$40,a 000040 1220 P:000175 2F8000 move #$800000,b 1221 P:000176 21C400 move a,x0 1222 P:000177 0C1E79 asr x0,b,b 1223 P:000178 5EF000 move y:mask,a 000000 1224 P:00017A 5F7000 move b,y:mask 000000 1225 1226 P:00017C 567000 move a,x:M_STXL ; echo character FFFF95 1227 P:00017E 65F400 move #text2,r5 000055 1228 P:000180 0D0133 jsr print 1229 P:000181 015084 sub #$10,a 1230 P:000182 019381 jclr #1,x:M_SSR,* ;wait for tx to finish 000182 1231 P:000184 019380 jclr #0,x:M_SSR,* ;wait for tx to finish 000184 1232 P:000186 017A85 cmp #$3A,a ; is a 10 digit? 1233 P:000187 0D1049 blt isci0 000016 Motorola DSP56300 Assembler Version 6.2.0 99-12-02 20:05:02 pass_S~3.asm Page 5 1234 P:000189 0140C5 cmp #$44,a ;is a 20 digit? 000044 1235 P:00018B 0D1049 blt isci1 00000B 1236 1237 P:00018D 07F415 movep #$32,x:M_STXL 000032 1238 P:00018F 015484 sub #$14,a 1239 P:000190 019381 jclr #1,x:M_SSR,* ;wait for tx to finish 000190 1240 P:000192 019380 jclr #0,x:M_SSR,* ;wait for tx to finish 000192 1241 P:000194 0D10C0 bra isci0 000009 1242 P:000196 07F415 isci1 movep #$31,x:M_STXL 000031 1243 P:000198 014A84 sub #$0a,a 1244 P:000199 019381 jclr #1,x:M_SSR,* ;wait for tx to finish 000199 1245 P:00019B 019380 jclr #0,x:M_SSR,* ;wait for tx to finish 00019B 1246 1247 P:00019D 019381 isci0 jclr #1,x:M_SSR,* ;wait for tx to finish 00019D 1248 P:00019F 019380 jclr #0,x:M_SSR,* ;wait for tx to finish 00019F 1249 P:0001A1 567000 move a,x:M_STXL FFFF95 1250 P:0001A3 65F400 move #text3,r5 00005B 1251 P:0001A5 0D0133 jsr print 1252 1253 P:0001A6 20CE00 iscend move y0,a ;restore A 1254 P:0001A7 000004 rti 1255 1256 1257 include 'ada_init.asm' 1258 page 132,60 1259 ;************************************************************************** 1260 ; ADA_INIT.ASM Ver 1.2 1261 ; Example program to initialize the CS4218 1262 ; 1263 ; Copyright (c) MOTOROLA 1995, 1996, 1997, 1998 1264 ; Semiconductor Products Sector 1265 ; Wireless Signal Processing Division 1266 ; 1267 ; History: 1268 ; 14 June 1996: RLR/LJD - ver 1.0 1269 ; 21 July 1997: BEA - ver 1.1 1270 ; 23 Sept 1998: TTL - ver 1.2 1271 ;************************************************************************** 1272 X:00000A org x: 1273 1274 ; Codec control constants 1275 X:00000A CTRL_WD_HI ds 1 1276 X:00000B CTRL_WD_LO ds 1 Motorola DSP56300 Assembler Version 6.2.0 99-12-02 20:05:02 ada_init.asm Page 6 1277 1278 1279 ; GPIO pin constants 1280 1281 ; ESSI0 - audio data GPIO mode 1282 ; DSP CODEC 1283 ; --------------------------- 1284 CODEC_RESET 1285 000000 equ 0 ; bit0 SC00 ---> CODEC_RESET~ 1286 1287 ; ESSI1 - control data GPIO Mode 1288 ; DSP CODEC 1289 ;---------------------------- 1290 000000 CCS equ 0 ; bit0 SC10 ---> CCS~ 1291 000001 CCLK equ 1 ; bit1 SC11 ---> CCLK 1292 000002 CDIN equ 2 ; bit2 SC12 ---> CDIN 1293 1294 ;************************************************************************** 1295 ; Initialize the CS4218 codec 1296 ; --------------------------- 1297 ; Serial Mode 4 (SM4), DSP Slave/Codec Master, 32-bits per frame 1298 ; 1299 ; After a reset, the control port must be written once to initialize it 1300 ; if the port will be accessed to read or write control bits. The initial 1301 ; write is a "dummy" write since the data is ignored by the codec. A second 1302 ; write is needed to configure the codec as desired. Then, the control port 1303 ; only needs to be written to when a change is desired, or to obtain status 1304 ; information. 1305 ; 1306 ; Although only 23 bits contain useful data in CDIN, a minimum of 31 bits 1307 ; must be written. 1308 ; 1309 ; CDIN 1310 ;------------------------------------------------ 1311 ; bit 31 0 1312 ;------------------------------------------------ 1313 ; bit 30 mask interrupt 1314 ; 0=no mask on MF5:\INT pin 1315 ; 1=mask on MF5:\INT pin 1316 ;------------------------------------------------ 1317 ; bit 29 DO1 1318 ;------------------------------------------------ 1319 ; bits 28-24 left output D/A sttenuation (1.5dB steps) 1320 ; 00000=No attenuation 0dB 1321 ; 11111=Max attenuation -46.5dB 1322 ;------------------------------------------------ 1323 ; bits 23-19 right output D/A attenuation (1.5dB steps) 1324 ; 00000=No attenuation 0dB 1325 ; 11111=Max attenuation -46.5dB 1326 ;------------------------------------------------ 1327 ; bit 18 mute D/A outputs 1328 ; 0=outputs ON 1329 ; 1=outputs MUTED 1330 ;------------------------------------------------ 1331 ; bit 17 input mux, left select 1332 ; 0=RIN1 Motorola DSP56300 Assembler Version 6.2.0 99-12-02 20:05:02 ada_init.asm Page 7 1333 ; 1=RIN2 (used on EVM) 1334 ;------------------------------------------------ 1335 ; bit 16 input mux, right select 1336 ; 0=LIN1 1337 ; 1=LIN2 (used on EVM) 1338 ;------------------------------------------------ 1339 ; bits 15-12 left input A/D gain (1.5dB steps) 1340 ; 0000=No gain 0dB 1341 ; 1111=Max gain +22.5dB 1342 ;------------------------------------------------ 1343 ; bits 11-8 right input A/D gain (1.5dB steps) 1344 ; 0000=No gain 0dB 1345 ; 1111=Max gain +22.5dB 1346 ;------------------------------------------------ 1347 ; bits 7-0 00000000 1348 ;------------------------------------------------ 1349 ;************************************************************************** 1350 1351 1352 P:0001A8 org p: 1353 ada_init 1354 1355 ; reset ESSI ports 1356 P:0001A8 07F43F movep #$0000,x:M_PCRC ; reset ESSI0 port 000000 1357 P:0001AA 07F42F movep #$0000,x:M_PCRD ; reset ESSI1 port 000000 1358 1359 ; Set Control Register A and B 1360 P:0001AC 07F435 movep #$101807,x:M_CRA0 ; 12.288MHz/16 = 768KHz SCLK 101807 1361 ; prescale modulus = 8 1362 ; frame rate divider = 2 1363 ; 16-bits per word 1364 ; 32-bits per frame 1365 ; 16-bit data aligned to bit 23 1366 1367 P:0001AE 07F436 movep #$ff330c,x:M_CRB0 ; Enable REIE,TEIE,RLIE,TLIE, FF330C 1368 ; RIE,TIE,RE,TE0 1369 ; network mode, synchronous, 1370 ; out on rising/in on falling 1371 ; shift MSB first 1372 ; external clock source drives SCK 1373 ; (codec is master) 1374 ; RX frame sync pulses active for 1375 ; 1 bit clock immediately before 1376 ; transfer period 1377 ; positive frame sync polarity 1378 ; frame sync length is 1-bit 1379 1380 ; Configure GPIO pins -- (functionality and direction ) 1381 P:0001B0 07F43F movep #$0000,x:M_PCRC ; Enable GPIO pin 0 SC00=CODEC_RESET 000000 1382 P:0001B2 07F42F movep #$0000,x:M_PCRD ; Enable GPIO CSS (pin 0),CCLK (pin 1), CDIN (pin 2) Motorola DSP56300 Assembler Version 6.2.0 99-12-02 20:05:02 ada_init.asm Page 8 000000 1383 1384 P:0001B4 07F43E movep #$0001,x:M_PRRC ; set PC0=CODEC_RESET~ as output 000001 1385 P:0001B6 07F42E movep #$0007,x:M_PRRD ; set PD0=CCS~ as output 000007 1386 ; set PD1=CCLK as output 1387 ; set PD2=CDIN as output 1388 1389 ; Codec Reset 1390 P:0001B8 013D00 bclr #CODEC_RESET,x:M_PDRC ; assert CODEC_RESET~ 1391 P:0001B9 012D00 bclr #CCS,x:M_PDRD ; assert CCS~ -- allows control register to be writte n to 1392 1393 ; Delay to allow Codec to reset 1394 P:0001BA 06E883 do #1000,_delay_loop 0001BD 1395 P:0001BC 06E8A3 rep #1000 ; minimum 50 ms delay 1396 P:0001BD 000000 nop 1397 _delay_loop 1398 1399 1400 ; Setting up to send Codec control information 1401 P:0001BE 013D20 bset #CODEC_RESET,x:M_PDRC ; deassert CODEC_RESET~ 1402 1403 1404 ; Sending control words 1405 set_control 1406 P:0001BF 44F400 move #CTRL_WD_12,x0 ; transfer control value to control variable 000300 1407 P:0001C1 440A00 move x0,x:CTRL_WD_HI 1408 P:0001C2 240000 move #CTRL_WD_34,x0 1409 P:0001C3 440B00 move x0,x:CTRL_WD_LO 1410 P:0001C4 0BF080 jsr codec_control ; send in dummy control information 0001CE 1411 P:0001C6 0BF080 jsr codec_control ; send in correct control information 0001CE 1412 1413 1414 ; Set and enable interrupts 1415 P:0001C8 08F4BE movep #$000c,x:M_IPRP ; set interrupt priority level for ESSI0 to 3 00000C 1416 P:0001CA 00FCB8 andi #$fc,mr ; enable interrupts 1417 1418 ; Set ESSI functionality 1419 P:0001CB 07F43F movep #$003e,x:M_PCRC ; enable ESSI0 except SC00=CODEC_RESET 00003E 1420 1421 P:0001CD 00000C rts 1422 1423 1424 ;------------------------------------------------------------- 1425 ; codec_control routine 1426 ; Input: CTRL_WD_LO and CTRL_WD_HI 1427 ; Output: CDIN 1428 ; Description: Used to send control information to CODEC Motorola DSP56300 Assembler Version 6.2.0 99-12-02 20:05:02 ada_init.asm Page 9 1429 ; NOTE: does not preserve the 'a' register. 1430 ;------------------------------------------------------------- 1431 codec_control 1432 P:0001CE 200013 clr a 1433 P:0001CF 012D00 bclr #CCS,x:M_PDRD ; assert CCS 1434 P:0001D0 548A00 move x:CTRL_WD_HI,a1 ; upper 16 bits of control data 1435 P:0001D1 0BF080 jsr send_codec ; shift out upper control word 0001D8 1436 P:0001D3 548B00 move x:CTRL_WD_LO,a1 ; lower 16 bits of control data 1437 P:0001D4 0BF080 jsr send_codec ; shift out lower control word 0001D8 1438 P:0001D6 012D20 bset #CCS,x:M_PDRD ; deassert CCS 1439 P:0001D7 00000C rts 1440 1441 1442 ;--------------------------------------------------------------- 1443 ; send_codec routine 1444 ; Input: a1 containing control information 1445 ; Output: sends bits to CDIN 1446 ; Description: Determines bits to send to CDIN 1447 ;--------------------------------------------------------------- 1448 1449 send_codec 1450 P:0001D8 061080 do #16,end_send_codec ; 16 bits per word 0001E4 1451 P:0001DA 012D21 bset #CCLK,x:M_PDRD ; toggle CCLK clock high 1452 P:0001DB 0ACC17 jclr #23,a1,bit_low ; test msb 0001E0 1453 P:0001DD 012D22 bset #CDIN,x:M_PDRD ; send high into CDIN 1454 P:0001DE 0AF080 jmp continue 0001E1 1455 bit_low 1456 P:0001E0 012D02 bclr #CDIN,x:M_PDRD ; send low into CDIN 1457 continue 1458 P:0001E1 0602A0 rep #2 ; delay 1459 P:0001E2 000000 nop 1460 P:0001E3 012D01 bclr #CCLK,x:M_PDRD ; restart cycle 1461 P:0001E4 200033 lsl a ; shift control word to 1 bit 1462 ; to left 1463 end_send_codec 1464 P:0001E5 00000C rts 1465 1466 1467 1468 1469 ;**************************************************************************** 1470 ; SSI0_ISR.ASM Ver.2.0 1471 ; Example program to handle interrupts through 1472 ; the 56307 SSI0 to move audio through the CS4218 1473 ; 1474 ; Copyright (c) MOTOROLA 1995, 1996, 1997, 1998 1475 ; Semiconductor Products Sector 1476 ; Digital Signal Processing Division 1477 ; 1478 ; 1479 ; History: Motorola DSP56300 Assembler Version 6.2.0 99-12-02 20:05:02 ada_init.asm Page 10 1480 ; 14 June 1996: RLR/LJD - ver 1.0 1481 ; 23 July 1997: BEA - ver 1.1 1482 ;****************************************************************************** 1483 1484 1485 ;----the actual interrupt service routines (ISRs) follow: 1486 1487 ;************************ SSI TRANSMIT ISR ********************************* 1488 ssi_txe_isr 1489 P:0001E6 013704 bclr #4,x:M_SSISR0 ; Read SSISR to clear exception flag 1490 ; explicitly clears underrun flag 1491 ssi_tx_isr 1492 P:0001E7 605F00 move r0,x:(r7)+ ; Save r0 to the stack. 1493 P:0001E8 055F20 move m0,x:(r7)+ ; Save m0 to the stack. 1494 P:0001E9 0501A0 move #1,m0 ; Modulus 2 buffer. 1495 P:0001EA 608900 move x:TX_PTR,r0 ; Load the pointer to the tx buffer. 1496 P:0001EB 000000 nop 1497 P:0001EC 000000 nop 1498 P:0001ED 000000 nop 1499 P:0001EE 07D83C movep x:(r0)+,x:M_TX00 ; SSI transfer data register. 1500 P:0001EF 600900 move r0,x:TX_PTR ; Update tx buffer pointer. 1501 P:0001F0 05FF20 move x:-(r7),m0 ; Restore m0. 1502 P:0001F1 60FF00 move x:-(r7),r0 ; Restore r0. 1503 P:0001F2 000004 rti 1504 1505 ;********************* SSI TRANSMIT LAST SLOT ISR ************************** 1506 ssi_txls_isr 1507 P:0001F3 605F00 move r0,x:(r7)+ ; Save r0 to the stack. 1508 P:0001F4 300400 move #TX_BUFF_BASE,r0 ; Reset pointer. 1509 P:0001F5 000000 nop 1510 P:0001F6 600900 move r0,x:TX_PTR ; Reset tx buffer pointer just in 1511 P:0001F7 000000 nop ; case it was corrupted. 1512 P:0001F8 60FF00 move x:-(r7),r0 ; Restore r0. 1513 P:0001F9 000004 rti 1514 1515 ;************************** SSI receive ISR ******************************** 1516 ssi_rxe_isr 1517 P:0001FA 013705 bclr #5,x:M_SSISR0 ; Read SSISR to clear exception flag 1518 ; explicitly clears overrun flag 1519 ssi_rx_isr 1520 P:0001FB 605F00 move r0,x:(r7)+ ; Save r0 to the stack. 1521 P:0001FC 055F20 move m0,x:(r7)+ ; Save m0 to the stack. 1522 P:0001FD 0501A0 move #1,m0 ; Modulus 2 buffer. 1523 P:0001FE 608800 move x:RX_PTR,r0 ; Load the pointer to the rx buffer. 1524 P:0001FF 000000 nop 1525 P:000200 000000 nop 1526 P:000201 000000 nop 1527 P:000202 075838 movep x:M_RX0,x:(r0)+ ; Read out received data to buffer. 1528 P:000203 600800 move r0,x:RX_PTR ; Update rx buffer pointer. 1529 P:000204 05FF20 move x:-(r7),m0 ; Restore m0. 1530 P:000205 60FF00 move x:-(r7),r0 ; Restore r0. 1531 P:000206 000004 rti 1532 1533 ;********************** SSI receive last slot ISR ************************** 1534 ssi_rxls_isr 1535 P:000207 605F00 move r0,x:(r7)+ ; Save r0 to the stack. Motorola DSP56300 Assembler Version 6.2.0 99-12-02 20:05:02 ada_init.asm Page 11 1536 P:000208 300000 move #RX_BUFF_BASE,r0 ; Reset rx buffer pointer just in 1537 ; case it was corrupted. 1538 P:000209 600800 move r0,x:RX_PTR ; Update rx buffer pointer. 1539 P:00020A 60FF00 move x:-(r7),r0 ; Restore r0. 1540 P:00020B 000004 rti 1541 1542 Y:000000 org y: 1543 Y:000000 mask dc $ffffff 1544 Y:000001 greet dc $0a0d00 1545 Y:000002 dc "This program demonstrates audio sampling" 1546 Y:000010 dc $0a0d00 1547 Y:000011 dc "at 1 to 24 bits. Attach Audio input to the" 1548 Y:000020 dc $0a0d00 1549 Y:000021 dc "Line in Jack and speakers/headphones to the" 1550 Y:000030 dc $0a0d00 1551 Y:000031 dc "Headphone out Jack. " 1552 Y:000038 dc $0a0d00 1553 Y:000039 dc $0a0d00 1554 Y:00003A dc "Type A-X to get the different sampling" 1555 Y:000047 dc $0a0d00 1556 Y:000048 dc "characteristics. A=1 bit, X=24 bit" 1557 Y:000054 dc $0a0d00 1558 Y:000055 text2 dc $0a0d00 1559 Y:000056 dc "Sampling at " 1560 Y:00005A dc $0 1561 Y:00005B text3 dc " bits" 1562 Y:00005D crlf dc $0a0d00,$0 1563 1564 Y:00005F text dc "Testing one two three" 1565 Y:000066 dc $0a0d00,$0 1566 1567 ;echo 1568 end 0 Errors 0 Warnings