Motorola DSP56300 Assembler Version 6.2.0 99-12-03 10:44:15 pass_s~5.asm Page 1 1 ;*************************************************************************** 2 ;QS_ST.ASM : WILL PASS AUDIO STRAIGHT THROUGH 3 ;*************************************************************************** 1067 1068 ;****************************************************************************** 1069 1070 ;---Buffer for talking to the CS4215 1071 1072 X:000000 org x:0 1073 RX_BUFF_BASE 1074 000000 equ * 1075 RX_data_1_2 1076 X:000000 ds 1 ;data time slot 1/2 for RX ISR 1077 RX_data_3_4 1078 X:000001 ds 1 ;data time slot 3/4 for RX ISR 1079 RX_data_5_6 1080 X:000002 ds 1 ;data time slot 5/6 for RX ISR 1081 RX_data_7_8 1082 X:000003 ds 1 ;data time slot 7/8 for RX ISR 1083 1084 TX_BUFF_BASE 1085 000004 equ * 1086 TX_data_1_2 1087 X:000004 ds 1 ;data time slot 1/2 for TX ISR 1088 TX_data_3_4 1089 X:000005 ds 1 ;data time slot 3/4 for TX ISR 1090 TX_data_5_6 1091 X:000006 ds 1 ;data time slot 5/6 for TX ISR 1092 TX_data_7_8 1093 X:000007 ds 1 ;data time slot 7/8 for TX ISR 1094 1095 X:000008 RX_PTR ds 1 ; Pointer for rx buffer 1096 X:000009 TX_PTR ds 1 ; Pointer for tx buffer 1097 1098 ;TONE_OUTPUT EQU HEADPHONE_EN+LINEOUT_EN+(4*LEFT_ATTN)+(4*RIGHT_ATTN) 1099 ;TONE_INPUT EQU MIC_IN_SELECT+(15*MONITOR_ATTN) 1100 ;CTRL_WD_12 equ NO_PREAMP+HI_PASS_FILT+SAMP_RATE_48+STEREO+DATA_16 ;CLB=0 1101 ;CTRL_WD_34 equ IMMED_3STATE+XTAL1_SELECT+BITS_64+CODEC_MASTER 1102 ;CTRL_WD_56 equ $000000 1103 ;CTRL_WD_78 equ $000000 1104 1105 000300 CTRL_WD_12 equ MIN_LEFT_ATTN+MIN_RIGHT_ATTN+LIN2+RIN2 1106 000000 CTRL_WD_34 equ MIN_LEFT_GAIN+MIN_RIGHT_GAIN 1107 1108 1109 P:000050 org p:$50 ;SCI Recieve Data Interrupt 1110 P:000050 0BF080 jsr ISCIRD 000157 1111 1112 P:000100 org p:$100 1113 START 1114 main 1115 P:000100 08F4BD movep #$040003,x:M_PCTL ; set PLL for MPY of 4X 040003 1116 P:000102 08F4BB movep #$012421,x:M_BCR ; set up one ext. wait state for all AAR areas 012421 Motorola DSP56300 Assembler Version 6.2.0 99-12-03 10:44:15 pass_s~5.asm Page 2 1117 P:000104 0003F8 ori #3,mr ;mask interrupts 1118 P:000105 0500BB movec #0,sp ;clear hardware stack pointer 1119 P:000106 0500BA move #0,omr ;operating mode 0 1120 P:000107 364000 move #$40,r6 ; initialise stack pointer 1121 P:000108 05F426 move #-1,m6 ; linear addressing FFFFFF 1122 P:00010A 0BF080 jsr ada_init ; initialize codec 000199 1123 1124 1125 ; initialize SCI 1126 ; 10-bit asynchronous mode 1127 ; enable reciever and transmitter 1128 P:00010C 07F41C movep #$000B02,x:M_SCR ; SCI control register 000B02 1129 ; set interrupt priority for SCI RECV to 1 1130 P:00010E 56F000 move x:M_IPRP,a FFFFFE 1131 ; enable tx and rx pins 1132 P:000110 07F41F movep #$000003,x:M_PCRE ; Port E Control Register 000003 1133 P:000112 0140C2 or #000080,a ; interrupt priority 2 000050 1134 ; Reciever/Transmitter clocks use external clock from SCLK 1135 P:000114 07F41B movep #$00C000,x:M_SCCR ; SCI Clock Control Register 00C000 1136 P:000116 567000 move a,x:M_IPRP ; interrupt priority peripheral FFFFFE 1137 1138 ;print a greeting and instructions 1139 P:000118 65F400 move #greet,r5 000001 1140 P:00011A 0BF080 jsr print 000133 1141 1142 ; move #$123456,a1 1143 ; move #$789abc,a0 1144 ; move a,y0 1145 ; debug 1146 1147 1148 loop_1 1149 1150 P:00011C 01B7A2 jset #2,x:M_SSISR0,* ;wait for frame sync to pass 00011C 1151 P:00011E 01B782 jclr #2,x:M_SSISR0,* ;wait for frame sync 00011E 1152 1153 P:000120 568000 move x:RX_BUFF_BASE,a ;receive left 1154 P:000121 578100 move x:RX_BUFF_BASE+1,b ;receive right 1155 P:000122 0BF080 jsr process_stereo 00012D 1156 P:000124 560400 move a,x:TX_BUFF_BASE ;transmit left 1157 P:000125 570500 move b,x:TX_BUFF_BASE+1 ;transmit right 1158 1159 P:000126 46F400 move #CTRL_WD_12,y0 ;set up control words Motorola DSP56300 Assembler Version 6.2.0 99-12-03 10:44:15 pass_s~5.asm Page 3 000300 1160 P:000128 460600 move y0,x:TX_BUFF_BASE+2 1161 P:000129 46F400 move #CTRL_WD_12,y0 000300 1162 P:00012B 460700 move y0,x:TX_BUFF_BASE+3 1163 1164 P:00012C 0C011C jmp loop_1 1165 1166 process_stereo 1167 P:00012D 4EF000 move y:mask,y0 000000 1168 P:00012F 200056 and y0,a 1169 P:000130 20005E and y0,b 1170 P:000131 000000 nop 1171 P:000132 00000C rts 1172 1173 1174 ;print subroutine takes address in register r5 1175 ;exits when most significant byte is zero 1176 ;ignores zeros in lower bytes 1177 ; clobbers register y0 1178 print 1179 P:000133 21C600 move a,y0 ; back up reg A 1180 P:000134 5EDD00 prbegin move y:(r5)+,a 1181 P:000135 0140C5 cmp #$00ffff,a ;check to see if done (char=$00) 00FFFF 1182 P:000137 0D1049 blt prend 00001E 1183 P:000139 019381 jclr #1,x:M_SSR,* ;wait for tx to finish 000139 1184 P:00013B 019380 jclr #0,x:M_SSR,* ;wait for tx to finish 00013B 1185 P:00013D 567000 move a,x:M_STXH ; send high byte FFFF97 1186 P:00013F 0140C6 and #$00ffff,a 00FFFF 1187 P:000141 0140C5 cmp #$0000ff,a 0000FF 1188 P:000143 0597D1 blt prbegin 1189 P:000144 019381 jclr #1,x:M_SSR,* ;wait for tx to finish 000144 1190 P:000146 019380 jclr #0,x:M_SSR,* ;wait for tx to finish 000146 1191 P:000148 567000 move a,x:M_STXM ; send mid byte FFFF96 1192 P:00014A 0140C6 and #$0000ff,a 0000FF 1193 P:00014C 014085 cmp #$000000,a 1194 P:00014D 0597C7 blt prbegin 1195 P:00014E 019381 jclr #1,x:M_SSR,* ;wait for tx to finish 00014E 1196 P:000150 019380 jclr #0,x:M_SSR,* ;wait for tx to finish 000150 1197 P:000152 567000 move a,x:M_STXL ; send low byte FFFF95 1198 P:000154 050FC0 bra prbegin Motorola DSP56300 Assembler Version 6.2.0 99-12-03 10:44:15 pass_s~5.asm Page 4 1199 P:000155 20CE00 prend move y0,a ;restore reg A 1200 P:000156 00000C rts 1201 1202 1203 ; the SCI interrupt is triggered when a character is received 1204 ; this function takes the character, checks to make sure it is 1205 ; in the correct range (1-9, A-G, a-g) prints a message and 1206 ; modifies the output mask for that number of bits 1207 P:000157 21C600 ISCIRD move a,y0 ;back up A 1208 P:000158 56F000 move x:M_SRXL,a FFFF98 1209 P:00015A 017185 cmp #$31,a ; >='1' 1210 P:00015B 0D1049 blt iscend 00003C 1211 P:00015D 017A85 cmp #$3A,a ; <='9' 1212 P:00015E 0D1049 blt iscnum 000015 1213 1214 P:000160 0140C5 cmp #$40,a ; >='A' 000040 1215 P:000162 0D1049 blt iscend 000035 1216 P:000164 0140C5 cmp #$48,a ; <='G' 000048 1217 P:000166 0D1049 blt isclet 00000E 1218 P:000168 0140C5 cmp #$60,a ; >='a' 000060 1219 P:00016A 0D1049 blt iscend 00002D 1220 P:00016C 0140C5 cmp #$67,a ; <='g' 000067 1221 P:00016E 0D1047 bgt iscend 000029 1222 P:000170 016084 sub #$20,a 1223 P:000171 0D10C0 bra isclet 000003 1224 1225 P:000173 014780 iscnum add #$07,a 1226 P:000174 014980 isclet add #$09,a 1227 1228 P:000175 2F8000 isciup move #$800000,b ;initial mask 1229 P:000176 5E7000 move a,y:mask ;hold onto value temporarially 000000 1230 P:000178 0140C4 sub #$41,a ; ammount to shift mask 000041 1231 P:00017A 21C400 move a,x0 1232 P:00017B 0C1E79 asr x0,b,b ; shift the mask 1233 P:00017C 5EF000 move y:mask,a 000000 1234 P:00017E 5F7000 move b,y:mask 000000 1235 1236 P:000180 65F400 move #text2,r5 000069 1237 P:000182 0D0133 jsr print Motorola DSP56300 Assembler Version 6.2.0 99-12-03 10:44:15 pass_s~5.asm Page 5 1238 P:000183 015084 sub #$10,a 1239 P:000184 017A85 cmp #$3A,a ; is a 10 digit? 1240 P:000185 0D1049 blt isci0 000009 1241 1242 P:000187 019381 isci1 jclr #1,x:M_SSR,* ;wait for tx to finish 000187 1243 P:000189 019380 jclr #0,x:M_SSR,* ;wait for tx to finish 000189 1244 P:00018B 07F415 movep #$31,x:M_STXL 000031 1245 P:00018D 014A84 sub #$0a,a 1246 1247 P:00018E 019381 isci0 jclr #1,x:M_SSR,* ;wait for tx to finish 00018E 1248 P:000190 019380 jclr #0,x:M_SSR,* ;wait for tx to finish 000190 1249 P:000192 567000 move a,x:M_STXL FFFF95 1250 P:000194 65F400 move #text3,r5 00006E 1251 P:000196 0D0133 jsr print 1252 1253 P:000197 20CE00 iscend move y0,a ;restore A 1254 P:000198 000004 rti 1255 1256 1257 1258 1259 include 'ada_init.asm' 1260 page 132,60 1261 ;************************************************************************** 1262 ; ADA_INIT.ASM Ver 1.2 1263 ; Example program to initialize the CS4218 1264 ; 1265 ; Copyright (c) MOTOROLA 1995, 1996, 1997, 1998 1266 ; Semiconductor Products Sector 1267 ; Wireless Signal Processing Division 1268 ; 1269 ; History: 1270 ; 14 June 1996: RLR/LJD - ver 1.0 1271 ; 21 July 1997: BEA - ver 1.1 1272 ; 23 Sept 1998: TTL - ver 1.2 1273 ;************************************************************************** 1274 X:00000A org x: 1275 1276 ; Codec control constants 1277 X:00000A CTRL_WD_HI ds 1 1278 X:00000B CTRL_WD_LO ds 1 1279 1280 1281 ; GPIO pin constants 1282 1283 ; ESSI0 - audio data GPIO mode 1284 ; DSP CODEC 1285 ; --------------------------- Motorola DSP56300 Assembler Version 6.2.0 99-12-03 10:44:15 ada_init.asm Page 6 1286 CODEC_RESET 1287 000000 equ 0 ; bit0 SC00 ---> CODEC_RESET~ 1288 1289 ; ESSI1 - control data GPIO Mode 1290 ; DSP CODEC 1291 ;---------------------------- 1292 000000 CCS equ 0 ; bit0 SC10 ---> CCS~ 1293 000001 CCLK equ 1 ; bit1 SC11 ---> CCLK 1294 000002 CDIN equ 2 ; bit2 SC12 ---> CDIN 1295 1296 ;************************************************************************** 1297 ; Initialize the CS4218 codec 1298 ; --------------------------- 1299 ; Serial Mode 4 (SM4), DSP Slave/Codec Master, 32-bits per frame 1300 ; 1301 ; After a reset, the control port must be written once to initialize it 1302 ; if the port will be accessed to read or write control bits. The initial 1303 ; write is a "dummy" write since the data is ignored by the codec. A second 1304 ; write is needed to configure the codec as desired. Then, the control port 1305 ; only needs to be written to when a change is desired, or to obtain status 1306 ; information. 1307 ; 1308 ; Although only 23 bits contain useful data in CDIN, a minimum of 31 bits 1309 ; must be written. 1310 ; 1311 ; CDIN 1312 ;------------------------------------------------ 1313 ; bit 31 0 1314 ;------------------------------------------------ 1315 ; bit 30 mask interrupt 1316 ; 0=no mask on MF5:\INT pin 1317 ; 1=mask on MF5:\INT pin 1318 ;------------------------------------------------ 1319 ; bit 29 DO1 1320 ;------------------------------------------------ 1321 ; bits 28-24 left output D/A sttenuation (1.5dB steps) 1322 ; 00000=No attenuation 0dB 1323 ; 11111=Max attenuation -46.5dB 1324 ;------------------------------------------------ 1325 ; bits 23-19 right output D/A attenuation (1.5dB steps) 1326 ; 00000=No attenuation 0dB 1327 ; 11111=Max attenuation -46.5dB 1328 ;------------------------------------------------ 1329 ; bit 18 mute D/A outputs 1330 ; 0=outputs ON 1331 ; 1=outputs MUTED 1332 ;------------------------------------------------ 1333 ; bit 17 input mux, left select 1334 ; 0=RIN1 1335 ; 1=RIN2 (used on EVM) 1336 ;------------------------------------------------ 1337 ; bit 16 input mux, right select 1338 ; 0=LIN1 1339 ; 1=LIN2 (used on EVM) 1340 ;------------------------------------------------ 1341 ; bits 15-12 left input A/D gain (1.5dB steps) Motorola DSP56300 Assembler Version 6.2.0 99-12-03 10:44:15 ada_init.asm Page 7 1342 ; 0000=No gain 0dB 1343 ; 1111=Max gain +22.5dB 1344 ;------------------------------------------------ 1345 ; bits 11-8 right input A/D gain (1.5dB steps) 1346 ; 0000=No gain 0dB 1347 ; 1111=Max gain +22.5dB 1348 ;------------------------------------------------ 1349 ; bits 7-0 00000000 1350 ;------------------------------------------------ 1351 ;************************************************************************** 1352 1353 1354 P:000199 org p: 1355 ada_init 1356 1357 ; reset ESSI ports 1358 P:000199 07F43F movep #$0000,x:M_PCRC ; reset ESSI0 port 000000 1359 P:00019B 07F42F movep #$0000,x:M_PCRD ; reset ESSI1 port 000000 1360 1361 ; Set Control Register A and B 1362 P:00019D 07F435 movep #$101807,x:M_CRA0 ; 12.288MHz/16 = 768KHz SCLK 101807 1363 ; prescale modulus = 8 1364 ; frame rate divider = 2 1365 ; 16-bits per word 1366 ; 32-bits per frame 1367 ; 16-bit data aligned to bit 23 1368 1369 P:00019F 07F436 movep #$ff330c,x:M_CRB0 ; Enable REIE,TEIE,RLIE,TLIE, FF330C 1370 ; RIE,TIE,RE,TE0 1371 ; network mode, synchronous, 1372 ; out on rising/in on falling 1373 ; shift MSB first 1374 ; external clock source drives SCK 1375 ; (codec is master) 1376 ; RX frame sync pulses active for 1377 ; 1 bit clock immediately before 1378 ; transfer period 1379 ; positive frame sync polarity 1380 ; frame sync length is 1-bit 1381 1382 ; Configure GPIO pins -- (functionality and direction ) 1383 P:0001A1 07F43F movep #$0000,x:M_PCRC ; Enable GPIO pin 0 SC00=CODEC_RESET 000000 1384 P:0001A3 07F42F movep #$0000,x:M_PCRD ; Enable GPIO CSS (pin 0),CCLK (pin 1), CDIN (pin 2) 000000 1385 1386 P:0001A5 07F43E movep #$0001,x:M_PRRC ; set PC0=CODEC_RESET~ as output 000001 1387 P:0001A7 07F42E movep #$0007,x:M_PRRD ; set PD0=CCS~ as output 000007 1388 ; set PD1=CCLK as output Motorola DSP56300 Assembler Version 6.2.0 99-12-03 10:44:15 ada_init.asm Page 8 1389 ; set PD2=CDIN as output 1390 1391 ; Codec Reset 1392 P:0001A9 013D00 bclr #CODEC_RESET,x:M_PDRC ; assert CODEC_RESET~ 1393 P:0001AA 012D00 bclr #CCS,x:M_PDRD ; assert CCS~ -- allows control register to be writte n to 1394 1395 ; Delay to allow Codec to reset 1396 P:0001AB 06E883 do #1000,_delay_loop 0001AE 1397 P:0001AD 06E8A3 rep #1000 ; minimum 50 ms delay 1398 P:0001AE 000000 nop 1399 _delay_loop 1400 1401 1402 ; Setting up to send Codec control information 1403 P:0001AF 013D20 bset #CODEC_RESET,x:M_PDRC ; deassert CODEC_RESET~ 1404 1405 1406 ; Sending control words 1407 set_control 1408 P:0001B0 44F400 move #CTRL_WD_12,x0 ; transfer control value to control variable 000300 1409 P:0001B2 440A00 move x0,x:CTRL_WD_HI 1410 P:0001B3 240000 move #CTRL_WD_34,x0 1411 P:0001B4 440B00 move x0,x:CTRL_WD_LO 1412 P:0001B5 0BF080 jsr codec_control ; send in dummy control information 0001BF 1413 P:0001B7 0BF080 jsr codec_control ; send in correct control information 0001BF 1414 1415 1416 ; Set and enable interrupts 1417 P:0001B9 08F4BE movep #$000c,x:M_IPRP ; set interrupt priority level for ESSI0 to 3 00000C 1418 P:0001BB 00FCB8 andi #$fc,mr ; enable interrupts 1419 1420 ; Set ESSI functionality 1421 P:0001BC 07F43F movep #$003e,x:M_PCRC ; enable ESSI0 except SC00=CODEC_RESET 00003E 1422 1423 P:0001BE 00000C rts 1424 1425 1426 ;------------------------------------------------------------- 1427 ; codec_control routine 1428 ; Input: CTRL_WD_LO and CTRL_WD_HI 1429 ; Output: CDIN 1430 ; Description: Used to send control information to CODEC 1431 ; NOTE: does not preserve the 'a' register. 1432 ;------------------------------------------------------------- 1433 codec_control 1434 P:0001BF 200013 clr a 1435 P:0001C0 012D00 bclr #CCS,x:M_PDRD ; assert CCS 1436 P:0001C1 548A00 move x:CTRL_WD_HI,a1 ; upper 16 bits of control data 1437 P:0001C2 0BF080 jsr send_codec ; shift out upper control word Motorola DSP56300 Assembler Version 6.2.0 99-12-03 10:44:15 ada_init.asm Page 9 0001C9 1438 P:0001C4 548B00 move x:CTRL_WD_LO,a1 ; lower 16 bits of control data 1439 P:0001C5 0BF080 jsr send_codec ; shift out lower control word 0001C9 1440 P:0001C7 012D20 bset #CCS,x:M_PDRD ; deassert CCS 1441 P:0001C8 00000C rts 1442 1443 1444 ;--------------------------------------------------------------- 1445 ; send_codec routine 1446 ; Input: a1 containing control information 1447 ; Output: sends bits to CDIN 1448 ; Description: Determines bits to send to CDIN 1449 ;--------------------------------------------------------------- 1450 1451 send_codec 1452 P:0001C9 061080 do #16,end_send_codec ; 16 bits per word 0001D5 1453 P:0001CB 012D21 bset #CCLK,x:M_PDRD ; toggle CCLK clock high 1454 P:0001CC 0ACC17 jclr #23,a1,bit_low ; test msb 0001D1 1455 P:0001CE 012D22 bset #CDIN,x:M_PDRD ; send high into CDIN 1456 P:0001CF 0AF080 jmp continue 0001D2 1457 bit_low 1458 P:0001D1 012D02 bclr #CDIN,x:M_PDRD ; send low into CDIN 1459 continue 1460 P:0001D2 0602A0 rep #2 ; delay 1461 P:0001D3 000000 nop 1462 P:0001D4 012D01 bclr #CCLK,x:M_PDRD ; restart cycle 1463 P:0001D5 200033 lsl a ; shift control word to 1 bit 1464 ; to left 1465 end_send_codec 1466 P:0001D6 00000C rts 1467 1468 1469 1470 1471 ;**************************************************************************** 1472 ; SSI0_ISR.ASM Ver.2.0 1473 ; Example program to handle interrupts through 1474 ; the 56307 SSI0 to move audio through the CS4218 1475 ; 1476 ; Copyright (c) MOTOROLA 1995, 1996, 1997, 1998 1477 ; Semiconductor Products Sector 1478 ; Digital Signal Processing Division 1479 ; 1480 ; 1481 ; History: 1482 ; 14 June 1996: RLR/LJD - ver 1.0 1483 ; 23 July 1997: BEA - ver 1.1 1484 ;****************************************************************************** 1485 1486 1487 ;----the actual interrupt service routines (ISRs) follow: 1488 Motorola DSP56300 Assembler Version 6.2.0 99-12-03 10:44:15 ada_init.asm Page 10 1489 ;************************ SSI TRANSMIT ISR ********************************* 1490 ssi_txe_isr 1491 P:0001D7 013704 bclr #4,x:M_SSISR0 ; Read SSISR to clear exception flag 1492 ; explicitly clears underrun flag 1493 ssi_tx_isr 1494 P:0001D8 605F00 move r0,x:(r7)+ ; Save r0 to the stack. 1495 P:0001D9 055F20 move m0,x:(r7)+ ; Save m0 to the stack. 1496 P:0001DA 0501A0 move #1,m0 ; Modulus 2 buffer. 1497 P:0001DB 608900 move x:TX_PTR,r0 ; Load the pointer to the tx buffer. 1498 P:0001DC 000000 nop 1499 P:0001DD 000000 nop 1500 P:0001DE 000000 nop 1501 P:0001DF 07D83C movep x:(r0)+,x:M_TX00 ; SSI transfer data register. 1502 P:0001E0 600900 move r0,x:TX_PTR ; Update tx buffer pointer. 1503 P:0001E1 05FF20 move x:-(r7),m0 ; Restore m0. 1504 P:0001E2 60FF00 move x:-(r7),r0 ; Restore r0. 1505 P:0001E3 000004 rti 1506 1507 ;********************* SSI TRANSMIT LAST SLOT ISR ************************** 1508 ssi_txls_isr 1509 P:0001E4 605F00 move r0,x:(r7)+ ; Save r0 to the stack. 1510 P:0001E5 300400 move #TX_BUFF_BASE,r0 ; Reset pointer. 1511 P:0001E6 000000 nop 1512 P:0001E7 600900 move r0,x:TX_PTR ; Reset tx buffer pointer just in 1513 P:0001E8 000000 nop ; case it was corrupted. 1514 P:0001E9 60FF00 move x:-(r7),r0 ; Restore r0. 1515 P:0001EA 000004 rti 1516 1517 ;************************** SSI receive ISR ******************************** 1518 ssi_rxe_isr 1519 P:0001EB 013705 bclr #5,x:M_SSISR0 ; Read SSISR to clear exception flag 1520 ; explicitly clears overrun flag 1521 ssi_rx_isr 1522 P:0001EC 605F00 move r0,x:(r7)+ ; Save r0 to the stack. 1523 P:0001ED 055F20 move m0,x:(r7)+ ; Save m0 to the stack. 1524 P:0001EE 0501A0 move #1,m0 ; Modulus 2 buffer. 1525 P:0001EF 608800 move x:RX_PTR,r0 ; Load the pointer to the rx buffer. 1526 P:0001F0 000000 nop 1527 P:0001F1 000000 nop 1528 P:0001F2 000000 nop 1529 P:0001F3 075838 movep x:M_RX0,x:(r0)+ ; Read out received data to buffer. 1530 P:0001F4 600800 move r0,x:RX_PTR ; Update rx buffer pointer. 1531 P:0001F5 05FF20 move x:-(r7),m0 ; Restore m0. 1532 P:0001F6 60FF00 move x:-(r7),r0 ; Restore r0. 1533 P:0001F7 000004 rti 1534 1535 ;********************** SSI receive last slot ISR ************************** 1536 ssi_rxls_isr 1537 P:0001F8 605F00 move r0,x:(r7)+ ; Save r0 to the stack. 1538 P:0001F9 300000 move #RX_BUFF_BASE,r0 ; Reset rx buffer pointer just in 1539 ; case it was corrupted. 1540 P:0001FA 600800 move r0,x:RX_PTR ; Update rx buffer pointer. 1541 P:0001FB 60FF00 move x:-(r7),r0 ; Restore r0. 1542 P:0001FC 000004 rti 1543 1544 Y:000000 org y: Motorola DSP56300 Assembler Version 6.2.0 99-12-03 10:44:15 pass_s~5.asm Page 11 1545 Y:000000 mask dc $ffffff 1546 Y:000001 greet dc $0a0d00 1547 Y:000002 dc "This program demonstrates audio sampling on the " 1548 Y:000012 dc $0a0d00 1549 Y:000013 dc "Motorola DSP56303 at 1 to 16 bits." 1550 Y:00001F dc $0a0d00 1551 Y:000020 dc "Attach the audio input to the Line-In jack and speakers/headphones" 1552 Y:000036 dc $0a0d00 1553 Y:000037 dc "to the Headphone-Out jack. " 1554 Y:000041 dc $0a0d00 1555 Y:000042 dc $0a0d00 1556 Y:000043 dc "Type 1-9 or A-G to get the different sampling characteristics" 1557 Y:000058 dc $0a0d00 1558 Y:000059 dc "1=1 bit, G=16 bit" 1559 Y:00005F dc $0a0d00 1560 Y:000060 dc "Sampling at 16 bits" 1561 Y:000067 dc $0a0d00 1562 Y:000068 dc $0 1563 Y:000069 text2 dc "Sampling at " 1564 Y:00006D dc $0 1565 Y:00006E text3 dc " bits" 1566 Y:000070 crlf dc $0a0d00,$0 1567 1568 ;echo 1569 end 0 Errors 0 Warnings