Motorola DSP56300 Assembler Version 6.2.0 99-03-25 14:50:39 mempass.asm Page 1 1 ;*************************************************************************** 2 ;QS_ST.ASM : WILL PASS AUDIO STRAIGHT THROUGH 3 ;*************************************************************************** 1068 1069 ;****************************************************************************** 1070 1071 ;---Buffer for talking to the CS4215 1072 1073 X:000000 org x:0 1074 RX_BUFF_BASE 1075 000000 equ * 1076 RX_data_1_2 1077 X:000000 ds 1 ;data time slot 1/2 for RX ISR 1078 RX_data_3_4 1079 X:000001 ds 1 ;data time slot 3/4 for RX ISR 1080 RX_data_5_6 1081 X:000002 ds 1 ;data time slot 5/6 for RX ISR 1082 RX_data_7_8 1083 X:000003 ds 1 ;data time slot 7/8 for RX ISR 1084 1085 TX_BUFF_BASE 1086 000004 equ * 1087 TX_data_1_2 1088 X:000004 ds 1 ;data time slot 1/2 for TX ISR 1089 TX_data_3_4 1090 X:000005 ds 1 ;data time slot 3/4 for TX ISR 1091 TX_data_5_6 1092 X:000006 ds 1 ;data time slot 5/6 for TX ISR 1093 TX_data_7_8 1094 X:000007 ds 1 ;data time slot 7/8 for TX ISR 1095 1096 X:000008 RX_PTR ds 1 ; Pointer for rx buffer 1097 X:000009 TX_PTR ds 1 ; Pointer for tx buffer 1098 X:00000A X_PTR ds 1 ; X memory pointer 1099 1100 1101 ;TONE_OUTPUT EQU HEADPHONE_EN+LINEOUT_EN+(4*LEFT_ATTN)+(4*RIGHT_ATTN) 1102 ;TONE_INPUT EQU MIC_IN_SELECT+(15*MONITOR_ATTN) 1103 ;CTRL_WD_12 equ NO_PREAMP+HI_PASS_FILT+SAMP_RATE_48+STEREO+DATA_16 ;CLB=0 1104 ;CTRL_WD_34 equ IMMED_3STATE+XTAL1_SELECT+BITS_64+CODEC_MASTER 1105 ;CTRL_WD_56 equ $000000 1106 ;CTRL_WD_78 equ $000000 1107 1108 000300 CTRL_WD_12 equ MIN_LEFT_ATTN+MIN_RIGHT_ATTN+LIN2+RIN2 1109 000000 CTRL_WD_34 equ MIN_LEFT_GAIN+MIN_RIGHT_GAIN 1110 1111 040000 X_START equ $040000 1112 1113 P:000100 org p:$100 1114 START 1115 main 1116 P:000100 08F4BD movep #$040003,x:M_PCTL ; set PLL for MPY of 4X 040003 1117 ; set up external memory access here 1118 P:000102 08F4B9 movep #$040811,x:M_AAR0 040811 Motorola DSP56300 Assembler Version 6.2.0 99-03-25 14:50:39 mempass.asm Page 2 1119 P:000104 08F4BB movep #$012421,x:M_BCR ; set up one ext. wait state for all AAR areas 012421 1120 P:000106 0003F8 ori #3,mr ;mask interrupts 1121 P:000107 0500BB movec #0,sp ;clear hardware stack pointer 1122 P:000108 0500BA move #0,omr ;operating mode 0 1123 P:000109 364000 move #$40,r6 ; initialise stack pointer 1124 P:00010A 05F426 move #-1,m6 ; linear addressing FFFFFF 1125 ; set up x_ptr address 1126 P:00010C 240400 move #$040000,x0 1127 P:00010D 440A00 move x0,x:X_PTR 1128 P:00010E 0BF080 jsr ada_init ; initialize codec 000139 1129 1130 P:000110 638A00 move x:X_PTR,r3 1131 loop_1 1132 1133 P:000111 01B7A2 jset #2,x:M_SSISR0,* ;wait for frame sync to pass 000111 1134 P:000113 01B782 jclr #2,x:M_SSISR0,* ;wait for frame sync 000113 1135 1136 P:000115 568000 move x:RX_BUFF_BASE,a ;receive left 1137 P:000116 578100 move x:RX_BUFF_BASE+1,b ;receive right 1138 P:000117 0BF080 jsr process_stereo 000135 1139 1140 ; move to memory and increment 1141 P:000119 565B00 move a,x:(r3)+ 1142 P:00011A 575B00 move b,x:(r3)+ 1143 1144 P:00011B 226E00 move r3,a 1145 P:00011C 0140C5 cmp #$050000,a 050000 1146 1147 ; branch if less then $050000 1148 1149 ; brclr #2,sr,loop_1 1150 P:00011E 0CF9A3 brset #3,sr,loop_1 FFFFF3 1151 1152 1153 ; read from memory 1154 1155 P:000120 638A00 move x:X_PTR,r3 1156 1157 loop_2 **** 1158 [mempass.asm 90]: WARNING --- Pipeline stall reading register written in instruction at address: P:000120 (X data move fie ld) 1158 P:000121 56DB00 move x:(r3)+,a 1159 P:000122 57DB00 move x:(r3)+,b 1160 1161 P:000123 560400 move a,x:TX_BUFF_BASE ;transmit left 1162 P:000124 570500 move b,x:TX_BUFF_BASE+1 ;transmit right 1163 1164 P:000125 46F400 move #CTRL_WD_12,y0 ;set up control words Motorola DSP56300 Assembler Version 6.2.0 99-03-25 14:50:39 mempass.asm Page 3 000300 1165 P:000127 460600 move y0,x:TX_BUFF_BASE+2 1166 P:000128 46F400 move #CTRL_WD_12,y0 000300 1167 P:00012A 460700 move y0,x:TX_BUFF_BASE+3 1168 1169 P:00012B 226E00 move r3,a 1170 P:00012C 0140C5 cmp #$050000,a 050000 1171 1172 ; brclr #2,sr,loop_2 1173 P:00012E 0CF9A3 brset #3,sr,loop_2 FFFFF3 1174 1175 P:000130 44F400 move #040000,x0 009C40 1176 P:000132 440A00 move x0,x:X_PTR 1177 1178 loop_3 1179 P:000133 000000 nop 1180 P:000134 0C0133 jmp loop_3 1181 1182 process_stereo 1183 P:000135 000000 nop 1184 P:000136 000000 nop 1185 P:000137 000000 nop 1186 P:000138 00000C rts 1187 1188 include 'ada_init.asm' 1189 page 132,60 1190 ;************************************************************************** 1191 ; ADA_INIT.ASM Ver 1.2 1192 ; Example program to initialize the CS4218 1193 ; 1194 ; Copyright (c) MOTOROLA 1995, 1996, 1997, 1998 1195 ; Semiconductor Products Sector 1196 ; Wireless Signal Processing Division 1197 ; 1198 ; History: 1199 ; 14 June 1996: RLR/LJD - ver 1.0 1200 ; 21 July 1997: BEA - ver 1.1 1201 ; 23 Sept 1998: TTL - ver 1.2 1202 ;************************************************************************** 1203 X:00000B org x: 1204 1205 ; Codec control constants 1206 X:00000B CTRL_WD_HI ds 1 1207 X:00000C CTRL_WD_LO ds 1 1208 1209 1210 ; GPIO pin constants 1211 1212 ; ESSI0 - audio data GPIO mode 1213 ; DSP CODEC 1214 ; --------------------------- 1215 CODEC_RESET Motorola DSP56300 Assembler Version 6.2.0 99-03-25 14:50:39 ada_init.asm Page 4 1216 000000 equ 0 ; bit0 SC00 ---> CODEC_RESET~ 1217 1218 ; ESSI1 - control data GPIO Mode 1219 ; DSP CODEC 1220 ;---------------------------- 1221 000000 CCS equ 0 ; bit0 SC10 ---> CCS~ 1222 000001 CCLK equ 1 ; bit1 SC11 ---> CCLK 1223 000002 CDIN equ 2 ; bit2 SC12 ---> CDIN 1224 1225 ;************************************************************************** 1226 ; Initialize the CS4218 codec 1227 ; --------------------------- 1228 ; Serial Mode 4 (SM4), DSP Slave/Codec Master, 32-bits per frame 1229 ; 1230 ; After a reset, the control port must be written once to initialize it 1231 ; if the port will be accessed to read or write control bits. The initial 1232 ; write is a "dummy" write since the data is ignored by the codec. A second 1233 ; write is needed to configure the codec as desired. Then, the control port 1234 ; only needs to be written to when a change is desired, or to obtain status 1235 ; information. 1236 ; 1237 ; Although only 23 bits contain useful data in CDIN, a minimum of 31 bits 1238 ; must be written. 1239 ; 1240 ; CDIN 1241 ;------------------------------------------------ 1242 ; bit 31 0 1243 ;------------------------------------------------ 1244 ; bit 30 mask interrupt 1245 ; 0=no mask on MF5:\INT pin 1246 ; 1=mask on MF5:\INT pin 1247 ;------------------------------------------------ 1248 ; bit 29 DO1 1249 ;------------------------------------------------ 1250 ; bits 28-24 left output D/A sttenuation (1.5dB steps) 1251 ; 00000=No attenuation 0dB 1252 ; 11111=Max attenuation -46.5dB 1253 ;------------------------------------------------ 1254 ; bits 23-19 right output D/A attenuation (1.5dB steps) 1255 ; 00000=No attenuation 0dB 1256 ; 11111=Max attenuation -46.5dB 1257 ;------------------------------------------------ 1258 ; bit 18 mute D/A outputs 1259 ; 0=outputs ON 1260 ; 1=outputs MUTED 1261 ;------------------------------------------------ 1262 ; bit 17 input mux, left select 1263 ; 0=RIN1 1264 ; 1=RIN2 (used on EVM) 1265 ;------------------------------------------------ 1266 ; bit 16 input mux, right select 1267 ; 0=LIN1 1268 ; 1=LIN2 (used on EVM) 1269 ;------------------------------------------------ 1270 ; bits 15-12 left input A/D gain (1.5dB steps) 1271 ; 0000=No gain 0dB Motorola DSP56300 Assembler Version 6.2.0 99-03-25 14:50:39 ada_init.asm Page 5 1272 ; 1111=Max gain +22.5dB 1273 ;------------------------------------------------ 1274 ; bits 11-8 right input A/D gain (1.5dB steps) 1275 ; 0000=No gain 0dB 1276 ; 1111=Max gain +22.5dB 1277 ;------------------------------------------------ 1278 ; bits 7-0 00000000 1279 ;------------------------------------------------ 1280 ;************************************************************************** 1281 1282 1283 P:000139 org p: 1284 ada_init 1285 1286 ; reset ESSI ports 1287 P:000139 07F43F movep #$0000,x:M_PCRC ; reset ESSI0 port 000000 1288 P:00013B 07F42F movep #$0000,x:M_PCRD ; reset ESSI1 port 000000 1289 1290 ; Set Control Register A and B 1291 P:00013D 07F435 movep #$101807,x:M_CRA0 ; 12.288MHz/16 = 768KHz SCLK 101807 1292 ; prescale modulus = 8 1293 ; frame rate divider = 2 1294 ; 16-bits per word 1295 ; 32-bits per frame 1296 ; 16-bit data aligned to bit 23 1297 1298 P:00013F 07F436 movep #$ff330c,x:M_CRB0 ; Enable REIE,TEIE,RLIE,TLIE, FF330C 1299 ; RIE,TIE,RE,TE0 1300 ; network mode, synchronous, 1301 ; out on rising/in on falling 1302 ; shift MSB first 1303 ; external clock source drives SCK 1304 ; (codec is master) 1305 ; RX frame sync pulses active for 1306 ; 1 bit clock immediately before 1307 ; transfer period 1308 ; positive frame sync polarity 1309 ; frame sync length is 1-bit 1310 1311 ; Configure GPIO pins -- (functionality and direction ) 1312 P:000141 07F43F movep #$0000,x:M_PCRC ; Enable GPIO pin 0 SC00=CODEC_RESET 000000 1313 P:000143 07F42F movep #$0000,x:M_PCRD ; Enable GPIO CSS (pin 0),CCLK (pin 1), CDIN (pin 2) 000000 1314 1315 P:000145 07F43E movep #$0001,x:M_PRRC ; set PC0=CODEC_RESET~ as output 000001 1316 P:000147 07F42E movep #$0007,x:M_PRRD ; set PD0=CCS~ as output 000007 1317 ; set PD1=CCLK as output 1318 ; set PD2=CDIN as output Motorola DSP56300 Assembler Version 6.2.0 99-03-25 14:50:39 ada_init.asm Page 6 1319 1320 ; Codec Reset 1321 P:000149 013D00 bclr #CODEC_RESET,x:M_PDRC ; assert CODEC_RESET~ 1322 P:00014A 012D00 bclr #CCS,x:M_PDRD ; assert CCS~ -- allows control register to be writte n to 1323 1324 ; Delay to allow Codec to reset 1325 P:00014B 06E883 do #1000,_delay_loop 00014E 1326 P:00014D 06E8A3 rep #1000 ; minimum 50 ms delay 1327 P:00014E 000000 nop 1328 _delay_loop 1329 1330 1331 ; Setting up to send Codec control information 1332 P:00014F 013D20 bset #CODEC_RESET,x:M_PDRC ; deassert CODEC_RESET~ 1333 1334 1335 ; Sending control words 1336 set_control 1337 P:000150 44F400 move #CTRL_WD_12,x0 ; transfer control value to control variable 000300 1338 P:000152 440B00 move x0,x:CTRL_WD_HI 1339 P:000153 240000 move #CTRL_WD_34,x0 1340 P:000154 440C00 move x0,x:CTRL_WD_LO 1341 P:000155 0BF080 jsr codec_control ; send in dummy control information 00015F 1342 P:000157 0BF080 jsr codec_control ; send in correct control information 00015F 1343 1344 1345 ; Set and enable interrupts 1346 P:000159 08F4BE movep #$000c,x:M_IPRP ; set interrupt priority level for ESSI0 to 3 00000C 1347 P:00015B 00FCB8 andi #$fc,mr ; enable interrupts 1348 1349 ; Set ESSI functionality 1350 P:00015C 07F43F movep #$003e,x:M_PCRC ; enable ESSI0 except SC00=CODEC_RESET 00003E 1351 1352 P:00015E 00000C rts 1353 1354 1355 ;------------------------------------------------------------- 1356 ; codec_control routine 1357 ; Input: CTRL_WD_LO and CTRL_WD_HI 1358 ; Output: CDIN 1359 ; Description: Used to send control information to CODEC 1360 ; NOTE: does not preserve the 'a' register. 1361 ;------------------------------------------------------------- 1362 codec_control 1363 P:00015F 200013 clr a 1364 P:000160 012D00 bclr #CCS,x:M_PDRD ; assert CCS 1365 P:000161 548B00 move x:CTRL_WD_HI,a1 ; upper 16 bits of control data 1366 P:000162 0BF080 jsr send_codec ; shift out upper control word 000169 Motorola DSP56300 Assembler Version 6.2.0 99-03-25 14:50:39 ada_init.asm Page 7 1367 P:000164 548C00 move x:CTRL_WD_LO,a1 ; lower 16 bits of control data 1368 P:000165 0BF080 jsr send_codec ; shift out lower control word 000169 1369 P:000167 012D20 bset #CCS,x:M_PDRD ; deassert CCS 1370 P:000168 00000C rts 1371 1372 1373 ;--------------------------------------------------------------- 1374 ; send_codec routine 1375 ; Input: a1 containing control information 1376 ; Output: sends bits to CDIN 1377 ; Description: Determines bits to send to CDIN 1378 ;--------------------------------------------------------------- 1379 1380 send_codec 1381 P:000169 061080 do #16,end_send_codec ; 16 bits per word 000175 1382 P:00016B 012D21 bset #CCLK,x:M_PDRD ; toggle CCLK clock high 1383 P:00016C 0ACC17 jclr #23,a1,bit_low ; test msb 000171 1384 P:00016E 012D22 bset #CDIN,x:M_PDRD ; send high into CDIN 1385 P:00016F 0AF080 jmp continue 000172 1386 bit_low 1387 P:000171 012D02 bclr #CDIN,x:M_PDRD ; send low into CDIN 1388 continue 1389 P:000172 0602A0 rep #2 ; delay 1390 P:000173 000000 nop 1391 P:000174 012D01 bclr #CCLK,x:M_PDRD ; restart cycle 1392 P:000175 200033 lsl a ; shift control word to 1 bit 1393 ; to left 1394 end_send_codec 1395 P:000176 00000C rts 1396 1397 1398 1399 1400 ;**************************************************************************** 1401 ; SSI0_ISR.ASM Ver.2.0 1402 ; Example program to handle interrupts through 1403 ; the 56307 SSI0 to move audio through the CS4218 1404 ; 1405 ; Copyright (c) MOTOROLA 1995, 1996, 1997, 1998 1406 ; Semiconductor Products Sector 1407 ; Digital Signal Processing Division 1408 ; 1409 ; 1410 ; History: 1411 ; 14 June 1996: RLR/LJD - ver 1.0 1412 ; 23 July 1997: BEA - ver 1.1 1413 ;****************************************************************************** 1414 1415 1416 ;----the actual interrupt service routines (ISRs) follow: 1417 1418 ;************************ SSI TRANSMIT ISR ********************************* Motorola DSP56300 Assembler Version 6.2.0 99-03-25 14:50:39 ada_init.asm Page 8 1419 ssi_txe_isr 1420 P:000177 013704 bclr #4,x:M_SSISR0 ; Read SSISR to clear exception flag 1421 ; explicitly clears underrun flag 1422 ssi_tx_isr 1423 P:000178 605F00 move r0,x:(r7)+ ; Save r0 to the stack. 1424 P:000179 055F20 move m0,x:(r7)+ ; Save m0 to the stack. 1425 P:00017A 0501A0 move #1,m0 ; Modulus 2 buffer. 1426 P:00017B 608900 move x:TX_PTR,r0 ; Load the pointer to the tx buffer. 1427 P:00017C 000000 nop 1428 P:00017D 000000 nop 1429 P:00017E 000000 nop 1430 P:00017F 07D83C movep x:(r0)+,x:M_TX00 ; SSI transfer data register. 1431 P:000180 600900 move r0,x:TX_PTR ; Update tx buffer pointer. 1432 P:000181 05FF20 move x:-(r7),m0 ; Restore m0. 1433 P:000182 60FF00 move x:-(r7),r0 ; Restore r0. 1434 P:000183 000004 rti 1435 1436 ;********************* SSI TRANSMIT LAST SLOT ISR ************************** 1437 ssi_txls_isr 1438 P:000184 605F00 move r0,x:(r7)+ ; Save r0 to the stack. 1439 P:000185 300400 move #TX_BUFF_BASE,r0 ; Reset pointer. 1440 P:000186 000000 nop 1441 P:000187 600900 move r0,x:TX_PTR ; Reset tx buffer pointer just in 1442 P:000188 000000 nop ; case it was corrupted. 1443 P:000189 60FF00 move x:-(r7),r0 ; Restore r0. 1444 P:00018A 000004 rti 1445 1446 ;************************** SSI receive ISR ******************************** 1447 ssi_rxe_isr 1448 P:00018B 013705 bclr #5,x:M_SSISR0 ; Read SSISR to clear exception flag 1449 ; explicitly clears overrun flag 1450 ssi_rx_isr 1451 P:00018C 605F00 move r0,x:(r7)+ ; Save r0 to the stack. 1452 P:00018D 055F20 move m0,x:(r7)+ ; Save m0 to the stack. 1453 P:00018E 0501A0 move #1,m0 ; Modulus 2 buffer. 1454 P:00018F 608800 move x:RX_PTR,r0 ; Load the pointer to the rx buffer. 1455 P:000190 000000 nop 1456 P:000191 000000 nop 1457 P:000192 000000 nop 1458 P:000193 075838 movep x:M_RX0,x:(r0)+ ; Read out received data to buffer. 1459 P:000194 600800 move r0,x:RX_PTR ; Update rx buffer pointer. 1460 P:000195 05FF20 move x:-(r7),m0 ; Restore m0. 1461 P:000196 60FF00 move x:-(r7),r0 ; Restore r0. 1462 P:000197 000004 rti 1463 1464 ;********************** SSI receive last slot ISR ************************** 1465 ssi_rxls_isr 1466 P:000198 605F00 move r0,x:(r7)+ ; Save r0 to the stack. 1467 P:000199 300000 move #RX_BUFF_BASE,r0 ; Reset rx buffer pointer just in 1468 ; case it was corrupted. 1469 P:00019A 600800 move r0,x:RX_PTR ; Update rx buffer pointer. 1470 P:00019B 60FF00 move x:-(r7),r0 ; Restore r0. 1471 P:00019C 000004 rti 1472 echo 1473 end Motorola DSP56300 Assembler Version 6.2.0 99-03-25 14:50:39 mempass.asm Page 9 0 Errors 1 Warning